RUNWAY(4) Device Drivers Manual (hppa) RUNWAY(4)

runwayRunway bus

uturn* at mainbus?

The runway bus is a CPU and memory bus on systems based on the PA-7200, PA-8000, and later CPUs. The runway bus is a 64-bit multiplexed address/data bus with support for cache coherency and allows up to 4-way SMP system configurations.

One or two uturn(4) bridges connect the runway bus to the system's gsc(4) or pci(4) buses.

cpu(4), dino(4), gsc(4), intro(4), pci(4), uturn(4)

The runway driver first appeared in OpenBSD 3.7.

May 31, 2007 OpenBSD 7.5